CRL 702 Architectures and Algorithms for DSP Systems
Introduction to Digital Signal Prcessing System (DSP tasks;DSP processors and embodiments; Representation of DSP algorithms -block diagram, signal flow graph, data flow graph, dependence graph). Numeric Representation and
Arithmetic Operation Format (Fixed point and floating point representations; Extended precision; Floating point emulation; Q notation; Fixed point and floating point arithmetic operations). Architecture of Programmable Digital
Signal Processors ( Central processing unit- Data and program memory features; Peripheral interfacing,; Execution control).
Digital signal Processor specific Assembly language programming(Instruction types; Addressing modes. Assembly language programming for specific fixed / floating points DSP processor; Pipelining).
DSP Algorithms (Convolution and FFT; Methods for generation of elementary functions; Pseudo-random number generation.) Analysis and Optimization of DSP Algorithms and Systems (Loop bound and iteration bound; Retiming transformation; Unfolding transformation from data flow graph- folding transformation; Performance optimization using pipelining and / or parallel processing,)
Software Design for Low power (Sources of power consumption in a programmable DSP;) Software power estimation; Software optimization techniques for low power).
Familiarization with assembly language programming tools of chosen DSP Processor, Number representation formats and arithmetic operations, Basic DSP operations: Filtering, FFT, Random Number and other function generation algorithms, Laboratory Project.
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