CARE | Faculty | Prof Ankur Gupta

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About

Dr. Ankur Gupta obtained his Ph.D. from IIT Bombay in 2015 under the guidance of Prof. Maryam Shojaei Baghini and Prof. V. Ramgopal Rao. His doctoral thesis was titled "High Voltage DeMOS Device Design for Integrated RF Power Amplifier Applications”. He worked as a I/O circuit designer in Texas Instruments Inc., where he was responsible for architecture definition of the I/O, implementation by circuit design at schematic level and characterization. He was a visiting research scholar in Intel Inc., Germany where he worked on RF power amplifier design. He also worked in GlobalFoundries Singapore where he was responsible for RF-CMOS fabrication process integration.

Journals

2019

Sonam Jain, Sandeep G. Surya, Praveen Kumar, Ankur Gupta, V. Ramgopal Rao, "Sensitivity Improvement of Medical Dosimeters using solution-processed TIPS-Pentacene FETs", Accepted for publication, IEEE Sensors Journal, 2019. , International , Accepted
Singh, Sankalp Kumar; Kakkerla, Ramesh Kumar; Kaushik, Pragyey Kumar; ANANDAN, DEEPAK; Nagarajan, Venkatesan; Yu, Hung Wei ; Gupta, Ankur; Chang , Edward Yi, "High performance InAs/GaSb core-shell p-TFET: Device design and optimization" , International , Accepted
Sankalp Kumar Singh, Ramesh Kumar Kakkerla, H. Bijo Joseph, Ankur Gupta, Deepak Anandan, Venkatesh Nagarajan, Hung Wei Yu, D. John Thiruvadigal, Edward Yi Chang, "Optimization of InAs/GaSb core-shell nanowire structure for improved TFET performance" Materials Science in Semiconductor Processing, Elsevier, PP 247-252, Vol 101, 2019 , International , Accepted

2018

Sankalp Kumar Singh, Ramesh Kumar Kakkerla, H. Bijo Joseph, Ankur Gupta, Deepak Anandan, Venkatesan Nagarajan, Hung Wei Yu, D. John Thiruvadigal, Edward Yi Chang, "Device parameter optimization of InAs/GaSb core-shell nanowire for TFET application", IEEE-SNW-2018, June 17-18, 2018, Hawaii, USA , International , Accepted
Sankalp Kumar Singh, Ankur Gupta, Venkatesan Nagarajan, Deepak Anandan, Ramesh Kumar Kakkerla, Hung Wei Yu, Edward Yi Chang, "A novel p-channel GaSb based TFET with Pocket implant", ICONN-2019, January 28-30, SRM University, Chennai, India , International , Accepted
Ramesh Kumar Kakkerla, Sankalp Kumar Singh, H.Bijo Joseph, Ankur Gupta, Deepak Anandan, Venkatesan Nagarajan, Hung Wei Yu, Edward Y. Chang, " Novel InAs/GaSb Heterostructure Nanowire Based Tunnel Field Effect Transistor", SSDM 2018, September 09-13, 2018, The University of Tokyo, Tokyo, Japan , International , Accepted

2016 and before

Ankur Gupta, Mayank Shrivastava, Maryam Shojaei Baghini, Harald Gossner and V. Ramgopal Rao, “A Fully-Integrated Radio-Frequency Power Amplifier in 28nm CMOS Technology mounted in BGA Package,” IEEE International Conference on VLSI Design, 2016, pp. 156-161.
Ankur Gupta, Mayank Shrivastava, Maryam Shojaei Baghini, Dinesh Kumar Sharma, Harald Gossner and V. Ramgopal Rao, “High Voltage MOS Device Design for Improved Static and RF Performance,” IEEE Transactions on Electron Devices, vol. 62, no. 10, pp. 3168-3175, Oct. 2015.
Ankur Gupta, Mayank Shrivastava, Maryam Shojaei Baghini, A. N. Chandorkar, Harald Gossner and V. Ramgopal Rao, “A Fully Integrated RF PA in 28nm CMOS with Device Design for Optimized Performance and ESD Robustness,” IEEE Transactions on Electron Devices, vol. 62, no. 10, pp. 3176- 3183, Oct. 2015.
Ankur Gupta, Mayank Shrivastava, Maryam Shojaei Baghini, Dinesh Kumar Sharma, Harald Gossner and V. Ramgopal Rao, “On the Improved High-Frequency Linearity of Drain Extended MOS Devices,” IEEE Microwave and Wireless Components Letters, (accepted for publication).
Ankur Gupta, Mayank Shrivastava, Maryam Shojaei Baghini, Dinesh Kumar Sharma, A.N. Chandorkar, Harald Gossner and V. Ramgopal Rao, “Drain extended MOS device design for integrated RF PA in 28nm CMOS with optimized FoM and ESD robustness”, in IEEE International Electron Device Meeting (IEDM), Dec. 2014. pp. 3.5.1-3.5.4.
Ankur Gupta, Rajat Chauhan, Vinod Menezes, Vikas Narang and H.M. Roopashree, “A Robust Level Shifter Design for Adaptive Voltage Scaling,” IEEE International Conference on VLSI Design, 2008, pp. 383-388.

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